cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 1 / 9 MTBD6N25J3 cyste k product specification n - channel enhancement mode power mosfet MTBD6N25J3 features ? low gate charge ? simple drive requirement ? pb - free lead plating and halogen - free package equiv alent circuit outline o rdering inf ormation device package shipping MTBD6N25J3 - 0 - t3 - g t o - 252 (pb - free lead plating and halogen - free package) 25 00 pcs / tape & reel MTBD6N25J3 to - 252(dpak) g gate d drain s source bv dss 250v i d @ v gs =10v, t c =25 c 8a i d @ v gs =10v, t a =25 c 1.5a r dson(typ) v gs =10v, i d =5a 435m v gs =4. 5v, i d =3a 410m g d s envi ronment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13 reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 2 / 9 MTBD6N25J3 cyste k product specification absolute maximum ratings (t c = 25 ? c , unless otherwise noted ) parameter symbol limits unit drain - sour c e voltage v ds 250 v gate - source voltage v gs 20 continuous drain current @ v gs =10v, t c =25 ? c (note 1) i d 8 a continuous drain current @ v gs =10v, t c =100 ? c (note 1) 5 continuous drain current @ v gs =10v, t a =25 ? c (note 2) 1.5 continuous drain current @ v gs =10v, t a =70 ? c (note 2) 1.2 pulsed drain current (note 3) i dm 16 avalanche current (note 3) i as 2 avalanche energy @ l=50mh, i d =2a, v dd =50v (note 2) e as 100 mj repetitive avalanche energy@ l=0.1mh (note 3) e ar 2 total power dissipation @ t c =25 (note 1) p d 78 w total power dissipation @ t c = 100 (note 1) 21 total power dissipation @ t a = 25 (note 2) p dsm 2.5 tot al power dissipation @ t a = 70 (note 2) 1.6 operating junction and storage temperature range tj, tstg - 55~+1 50 ? c thermal data parameter symbol value unit thermal resistance, junction - to - case, max r th,j - c 1.6 ? c /w thermal resistance, junction - to - ambient, max (note 2) r ja 50 ? c /w thermal resistance, junction - to - ambient, max (note 4) r ja 110 ? c /w note : 1 . the power dissipation p d is based on t j(max) =150 c, using junction - to - case thermal resistance, and is m ore useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr - 4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. 3 . repetitive rating, pulse width limited by junction temperature t j(max) =150 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. 4. when mounted on the minimum pad size recommended (pcb mount), t 10s.
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 3 / 9 MTBD6N25J3 cyste k product specification characteristics (t c =25 ? symbol min. typ. max. unit t est conditions static bv dss 250 - - v v gs = 0v , i d = 250 a v gs(th) 1 - 2.5 v ds = v gs , i d = 250 a i gss - - 100 n a v gs = 20v, v ds =0v i dss - - 1 a v ds = 200v, v gs =0v - - 25 v ds = 200v, v gs =0v, t j =125 ? c r ds ( on ) *1 - 435 560 m v gs = 10v , i d = 5a - 410 530 v gs = 4 . 5 v , i d = 3a g fs *1 - 2.7 - s v ds = 40v , i d = 1.5a dynamic qg *1, 2 - 23.5 - nc v ds =200v, i d =1.5a, v gs =10v qgs *1, 2 - 2.8 - qgd *1, 2 - 7.8 - t d(on) *1, 2 - 10 - ns v ds =125v, i d =1.5a, v gs =10v, r g =25 tr *1, 2 - 17.8 - t d(off) *1, 2 - 99 - t f *1, 2 - 43.4 - ciss - 766 - pf v gs =0v, v ds =25v, f=1mhz co ss - 47 - crss - 31 - source - drain diode i s *1 - - 8 a i sm *3 - - 16 v sd *1 - 0.72 1 v i s =1a, v gs =0v trr - 47 - ns i f =1.5a, di f /dt=100a/ s qrr - 77 - nc note : * 1. pulse test : pulse width ? 3 0 0s, duty cycle ? 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 4 / 9 MTBD6N25J3 cyste k product specification typical characteristics typical output characteristics 0 2 4 6 8 10 12 0 1 2 3 4 5 6 7 8 9 10 v ds , drain-source voltage(v) i d , drain current (a) 10v,9v,8v,7v,6v,5v,4v v gs =3v 3.5v 2.5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 100 1000 10000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =4.5v v gs =10v v gs =6v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 2 4 6 8 10 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 200 300 400 500 600 700 800 900 1000 0 2 4 6 8 10 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =5a drain-source on-state resistance vs junction tempearture 0 0.5 1 1.5 2 2.5 3 -65 -35 -5 25 55 85 115 145 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =5a r ds(on) @tj=25c : 435m
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 5 / 9 MTBD6N25J3 cyste k product specification typical characteristic s(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -65 -35 -5 25 55 85 115 145 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =40v gate charge characteristics 0 2 4 6 8 10 0 5 10 15 20 25 qg, total gate charge(nc) v gs , gate-source voltage(v) v ds =200v i d =1.5a maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=150c v gs =10v, jc =1.6c/w single pulse dc 100ms r dson limited 1s 100 s 1ms 10ms maximum drain current vs case temperature 0 1 2 3 4 5 6 7 8 9 10 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =1.6c/w
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 6 / 9 MTBD6N25J3 cyste k product specification typical characteristic s(cont.) typical transfer characteristics 0 2 4 6 8 10 12 14 0 2 4 6 8 10 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to case 0 100 200 300 400 500 600 700 800 900 1000 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t c =25c jc =1.6c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =1.6c/w
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 7 / 9 MTBD6N25J3 cyste k product specification ree l dimension carrier tape dimension
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 8 / 9 MTBD6N25J3 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eut ectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 894j3 issued date : 20 15 . 04 . 02 revised date : page no. : 9 / 9 MTBD6N25J3 cyste k product specification to - 252 dimension dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l 2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1. controlling dimension: millimeters. 2 . maximum lead t hickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the ri ght to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liability for any consequence of customer product design, infringemen t of patents, or application assistance. marking: style: pin 1. gate 2. drain 3. source 4.drain 3 - lead to - 252 plastic surface mount package cyste k package code: j3 device name date code bd6 n25 1 2 3 4
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